Xilinx Answer #2174 : XC9500: Hitop.exe fails erroneously saying too many pins are used on 9500 design

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XC9500: Hitop.exe fails erroneously saying too many pins are used on 9500 design

Record #2174
Product Family: Hardware

Product Line: 9500

Product Part: 9500

Problem Title:

XC9500: Hitop.exe fails erroneously saying too many pins are used on 9500 design

Problem Description:
Urgency: Standard

General Description:

The resource checking of HITOP.EXE v6.1 and earlier did not
distinguish the total number of available global resource pins
from the total number of available global signal lines.

In the case where one global pin goes to both an inveted and
non- inverted global line, this may cause incorrect resource
checking failure.

For example, a design uses 108 of 108 pins and uses
1 fclk/gclk pin and 2 global clk signals, PCLK and /PCLK.
Resource checking fails with a message saying that 109 pins
are required for the design but only 108 pins are available.

Solution 1:

Solution:
This has been fixed in a newer version of software.
Download the latest fitter patch from the xilinx ftp site.

ftp.xilinx.com/pub/swhelp/cpld/fitterpc.zip
ftp.xilinx.com/pub/swhelp/cpld/fittersn.tar.Z
ftp.xilinx.com/pub/swhelp/cpld/fitterhp.tar.Z
For PC, Sun, and HP platforms respectively.

End of Record #2174 - Last Modified: 05/23/97 17:33

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