Answers Database
PPR 5.x: Possible cause of ERROR 9929
Record #2205
Product Family: Software
Product Line: XACT FPGA
Product Part: ppr
Problem Title:
PPR 5.x: Possible cause of ERROR 9929
Problem Description:
Urgency: Standard
General Description:
You may get the following error:
*** PPR: ERROR 9929:
Clock pins not sourced by global buffers, and/or TBUF input pins
and/or T pins cannot be completely routed.
An LCA file will be generated to permit analysis of this problem.
Possible resolutions are discussed below by load pin type.
Solution 1:
1. Check for clock pins and tbuf's as suggested in the error message. If everything is OK, turn ON x
blox optimization.
If you are running the tool from DOS/UNIX prompt, use '-b' option with xmake.
(ex: xmake -p 5204pq100-6 -x -b design_name)
If running Design Manager(windows), do this:
Design -> Implement -> edit Template(Implementation) -> Optimization -> Merge Flip-Flops into I/Os.
End of Record #2205 - Last Modified: 10/27/97 15:56 |
