Answers Database


M1.5, M1.4 MAP/NGDBUILD, LogiBLOX: Pin mismatch between block ... at pin ....


Record #2234

Product Family: Software

Product Line: FPGA Implementation

Product Part: logiblox

Product Version: 1.3.

Problem Title:

M1.5, M1.4 MAP/NGDBUILD, LogiBLOX:   Pin mismatch between block ... at pin .... 


Problem Description:
Urgency: standard

General Description:

WARNING:0 - Pin mismatch between block 'addsub1', TYPE='addsub32',
and file '/xilinx/fpga/design/addsub32.ngo' at pin 'A<31>'




Solution 1:

When the above warning or error occurs while running NGDBUILD
on a design that contains a LogiBLOX module, frequently the
cause is a mismatch between the bus pin dimension separator
(bus delimiter) used in the LogiBLOX module netlist and the
delimiter used in the block that contains it (i.e., the
bus element may be named "mybus<3>" in the LogiBLOX .NGO
(or .NGC) file, but may exist as "mybus(3)" in the design).

The solution is to ensure that the bus delimiter used in the
LogiBLOX module matches the one used in the symbol or
HDL instantiation that references the module. In LogiBLOX,
this can be done by either choosing the appropriate Vendor
from the Setup window (Viewlogic, Synopsys, Mentor, or
Foundation), or choosing "Other" for vendor and selecting the
correct Bus Notation setting from that window.

Hint:

To review what the settings were last used to generate a given
module, you can check the settings in the logiblox.ini file.




Solution 2:

Make sure that the pin *names* on the symbol block or HDL
instance that references the LogiBLOX module match the port
names on the LogiBLOX module itself.

- If using a HDL tool, paste the contents of the
   VHDL or Verilog template (.vhi and .vei, respectively) into
   your code to instantiate the module.

- If you are manually generating a symbol for the LogiBLOX
   module (necessaryfor some schematic entry tools), check
   to make sure that pin names match precisely.

Also note:

- Pin names should be in upper case.
- The names of the pins for a given module can be found in its
   .mod file.
- The bus notation used in the generated module can be found
   in the .ini file if you are uncertain which setting was
   used to generate your module.





End of Record #2234 - Last Modified: 11/02/98 16:49

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