Answers Database
FPGA Express: warning given: "'xxx/GC' (or /GS) is not connect to any net..."
Record #2254
Product Family: Software
Product Line: Synopsys
Product Part: FPGA Express
Product Version: 3.1
Problem Title:
FPGA Express: warning given: "'xxx/GC' (or /GS) is not connect to any net..."
Problem Description:
Urgency: Standard
When instantiating input/output flip flops, FPGA Express (any version up to and including 3.1) gives
the following warning message:
"Warning: The pin 'xxxxx/GC' is not connected to any net (FE-CHECK-1)"
This may also occur with instantiated latches and other inferred synchronous logic, and may also ref
er to a "GS" pin.
Solution 1:
This warning can be safely ignored. These warnings refer to the "Global Clear" and "Global Set" pin
s, which are required for simulation, and have no bearing on synthesis. The fact that they appear i
n FPGA Express stems from how their libraries were created.
End of Record #2254 - Last Modified: 05/21/99 09:12 |
