Answers Database
Timing error reported for both flop and RAM, but only applies to RAM
Record #2374
Product Family: Software
Product Line: FPGA Implementation
Product Part: ngdanno
Product Version: 1.3.
Problem Title:
Timing error reported for both flop and RAM, but only applies to RAM
Problem Description:
Urgency: Standard
General Description:
When a RAMS/RAMD is packed with a flop, when there are timing
errors simulating the RAM there may also be errors reported for
the flop that are not valid. This is due to the fact that the
flop and the RAM share the same K pin. Delay values for both primitives are annotated to this pin,
but only the larger (RAM) values is used.
Solution 1:
End of Record #2374 - Last Modified: 06/09/97 11:38 |
