Answers Database
FPGA/CPLD: Do FPGA and CPLD inputs have Hysteresis?
Record #2386
Problem Title:
FPGA/CPLD: Do FPGA and CPLD inputs have Hysteresis?
Problem Description:
Urgency: Standard
Keywords: FPGA, CPLD, hysteresis
Description
FGPA inputs do have about 200 ~ 300 mV of hysteresis, but this
is usually neglected in the presence of any groundbounce. CPLD (xc9500) inputs have ~100mV of hyster
esis.
Solution 1:
See page 13-15 of Programmable Logic Data Book 1996 for more
information.
Solution 2:
Virtex:
Ed McGettigan wrote:
Virtex has 100mV of hysteresis on the LVTTL, LVCMOS2 and PCI
input buffers. There is no hystersis on input buffers that require a Vref.
End of Record #2386 - Last Modified: 08/25/99 01:24 |
