Answers Database


M1.3.7 - Map swaps two bits of a bus corrupting logic


Record #2820

Product Family: Software

Product Line: FPGA Implementation

Product Part: map

Product Version: 1.3.

Problem Title:
M1.3.7 - Map swaps two bits of a bus corrupting logic


Problem Description:
Map swaps two bits of a bus corrupting logic.
The problem has been found to be related to incomplete specification of a carry CLB (e.g. not using RLOCs to completely specify LUTs to be merged with a CY4).

Reference #100012


Solution 1:

A patch is available at:

ftp://ftp.xilinx.com/pub/swhelp/M1.3_alliance/map_sun120897.tar.ZInternet Link
ftp://ftp.xilinx.com/pub/swhelp/M1.3_alliance/map_sol120897.tar.ZInternet Link
ftp://ftp.xilinx.com/pub/swhelp/M1.3_alliance/map_hp120897.tar.ZInternet Link
ftp://ftp.xilinx.com/pub/swhelp/M1.3_alliance/map_nt11.zipInternet Link

This patch is also available from the M1.3 Performance Pack CD.




End of Record #2820 - Last Modified: 11/20/98 16:39

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