Answers Database


M1 QuickHDL: VHDL/VITAL RAMs do not simulate properly or respond to stimuli on HP-UX systems


Record #2847

Product Family: Software

Product Line: Mentor

Product Part: QuickHDL

Product Version: B.4

Problem Title:
M1 QuickHDL: VHDL/VITAL RAMs do not simulate properly or respond to stimuli on HP-UX systems


Problem Description:
Urgency: Hot

General Description:

This problem may occur in QuickHDL when simulating a pre-synthesis
functional (having instantiated RAM modules), post-synthesis functional,
an M1 post-synthesis functional, or post-route timing model, i.e., any
simulation model that uses M1 VHDL/VITAL simprims.

RAMs may not simulate properly or respond to input stimuli under QuickHDL
on HP workstations. (Curiously, they simulate properly under other
operating systems.) The information stored in a RAM may remain at its
initial value even after you have tried to write new data to the RAM.

Any pre-synthesis simulation will use the Unisim library, and any simulation
after NGDBuild (post-synthesis functional or post-route timing simulation),
will use the simprim library.


Solution 1:

This problem occurs due to a misinterpretation of the function call
VitalStateTable by QuickHDL's VITAL-acceleration engine. To work around
the problem, this function must be recompiled so that it is interpreted by
the standard (non-VITAL) VHDL interpreter. This is done using the -novital
switch in QVHCOM, e.g.:

    qvhcom -work unisim -novital VitalStateTable \
     $XILINX/vhdl/src/unisims/unisim_VITAL.vhd

    qvhcom -work simprim -novital VitalStateTable \
      $XILINX/vhdl/src/simprims/simprim_VITAL.vhd

If your VHDL unisim or simprim library is not local or in a writeable directory, this command must be performed by your system administrator.

Note: This can theoretically degrade the performance of the QuickHDL
simulator, since the VitalStateTable function will no longer utilize
VITAL acceleration. The extent of this performance hit has not been
quantified.

For more information on compiling HDL models, see Xilinx Solution 2478.
This problem should be fixed in QuickHDL version 8.5_5.0c.




End of Record #2847 - Last Modified: 02/19/99 09:30

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