Answers Database
dc2ncf: How do you use the set_max_delay as a substitute for the set_multicycle_path command?
Record #2996
Product Family: Software
Product Line: Synopsys
Product Part: FPGA Compiler
Product Version: 1997.08
Problem Title:
dc2ncf: How do you use the set_max_delay as a substitute for the set_multicycle_path
command?
Problem Description:
Urgency: Standard
General Description: How do you use the set_max_delay as a substitute for
the set_multicycle_path command to constrain certain paths, in Synopsys ?
Solution 1:
set_multicycle_path is currently not translated by dc2ncf v1.3 and v1.4.
Example:
1. create_clock find(port,clock_input) -period 50
2. set_multicycle_path 4 -from "regs*" -to "regs*"
Instead, the user can explicitly state the time constraint from the
source to the target with the set_max_delay command.
Example:
1. create_clock find(port,clock_input) -period 50
2. set_max_delay 200 -from "regs*" -to "regs*"
There are other functions that are performed by the set_multicycle_path
command that are not addressed by the set_max_delay command so this is
strictly an incomplete solution. However, the other functions that the
set_multicycle_path command performs relates to ASIC-type designs, so
they're not an issue for FPGA designers. (For example, set_multicycle_path
deals with hold-time issues that arise while synthesizing that
set_max_delay doesn't consider.)
End of Record #2996 - Last Modified: 10/29/97 07:45 |
