Answers Database
M1.4,Powerview 6: vanlibcreate gives linker error compiling Logiblox VHDL library
Record #3078
Product Family: Software
Product Line: FPGA Implementation
Product Part: logiblox
Product Version: 1.4
Problem Title:
M1.4,Powerview 6: vanlibcreate gives linker error compiling Logiblox VHDL library
Problem Description:
Urgency: Standard
General Description:
If the following steps are taken while creating an M1 design with Powerview:
1) From ViewDraw, select 'Add->Logiblox'. The LogiBLOX GUI 'Setup' window
opens.
2) In the 'Options' tab in 'Setup' window, select only 'Behavioral VHDL
netlist'. Click on "OK".
3) In the LogiBLOX GUI main window, select any valid module configuration and
start the generation of VHDL model by clicking on "OK" button.
Viewdraw returns with a linker error during running of 'vanlibcreate' on
the LogiBLOX library.
On Solaris, it says:
ld.so.1: vanlibcreate: fatal: libucb.so.1: can't open file: errno=2 Killed
On HP_UX 10.20, it says:
/bin/ld: DP relative code in file <path_to_project>/logiblox.lib/mvlarith.
pdr/vantage.o - shared library must be position independent.
Use +z or +Z to recompile.
Solution 1:
When analyzing LogiBLOX VHDL models using Viewlogic on the Solaris platform
add /usr/ucblib to your LD_LIBRARY_PATH environment variable.
Solution 2:
The reason for the HP failure is that the Powerview VHDL analyzer requires
the "unbundled" version of the HP-UX C compiler. HP machines with the "unbundled" version usually h
ave /bin/cc linked to /usr/ccs/bin/cc which is
the "bundled" version.
End of Record #3078 - Last Modified: 11/13/97 12:55 |
