Answers Database
M1.5i/2.1i: Timing Analyzer reports "0 items analyzed" on a period constraint.
Record #3285
Product Family: Software
Product Line: FPGA Implementation
Product Part: Timing Analyzer
Product Version: 1.4
Problem Title:
M1.5i/2.1i: Timing Analyzer reports "0 items analyzed" on a period constraint.
Problem Description:
Urgency: Standard
General Description:
When timing analysis is performed, if a PERIOD constraint and a FROM:TO cover
the same path, the PERIOD constraint is overidden. This causes the path to only be
reported under the FROM:TO constraint.
This conflict normally occurs when using the OFFSET constraint with an associated
PERIOD constraint and the FROM:TO constraint. These two constraints perform
similar analysis and normally only one of them is needed.
Solution 1:
This is correct behavior. The user needs to decide what type of constraint that he
wants to use.
If the user wants to use the PERIOD constraint the solution is to remove the
FROM:TO constraint. Then the paths are reported under the PERIOD constraint.
See Xilinx Solution Record 2435
End of Record #3285 - Last Modified: 11/22/99 14:51 |
