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CPLD : XC9500/XL:Is there a reset or a done pin for CPLDs to determine if the device runs correctly?


Record #3321

Problem Title:
CPLD : XC9500/XL:Is there a reset or a done pin for CPLDs to determine if the device runs correctly?



Problem Description:
URGENCY: Standard

DESCRIPTION:
The configuration and powerup for CPLDs is different than FPGAs.


Solution 1:

There is no RESET or DONE pin for 9500/XL devices.
The only to verify that the configuration was loaded correctly is to
perform a JTAG Verify operation. This will readback the configuration
registers of the CPLD and compare them to the JEDEC file and determine
if the two differ.




End of Record #3321 - Last Modified: 12/17/99 10:44

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