Answers Database 2.1i JTAG Programmer - ... too many mismatches ... or ... frame # ... Record #3715 Product Family: Software Product Line: CPLD Implementation Product Part: CPLD Problem Title: 2.1i JTAG Programmer - ... too many mismatches ... or ... frame # ... Problem Description: Urgency: Standard General Description: When attempting to configure an FPGA, the JTAG Programmer software may produce the Error Message: " ...too many mismatches..." or "...frame#..." Solution 1: The above error message indicates that the "Verify" operation may have been incorrectly attempted on a device. (This can be verified by looking for a "Verifying device..." message preceding the above message.) Currently, the "Verify" operation is NOT supported for Virtex devices. However, JTAG Programmer users are able to get around this by using the Chain Operations menu. If a user executes operations from the Chain Operations dialog box while targeting a Virtex FPGA, the user should ensure that the "Verify" operation is NOT selected for the Virtex devices. The user can validate a Virtex configuration by probing the DONE pin. End of Record #3715 - Last Modified: 01/26/00 15:23

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!