Answers Database
F1.4, F1.5, Timing Simulator: '-' in signal names converted to '_'
Record #3938
Product Family: Software
Product Line: Aldec
Product Part: Foundation Logic Simulator
Product Version: 1.4
Problem Title:
F1.4, F1.5, Timing Simulator: '-' in signal names converted to '_'
Problem Description:
Urgency: Standard
General Description:
When a design contains a dash as the last character in a signal name ('-'), the dash
is converted to an underscore by ngd2edif when doing a backannotate (timing sim).
In timing simulation, this will cause test vectors created in Functional simulation to
appear blank (or missing signals), as well as problems with command files in
simulation, that refer to specific signal names, due to the fact that the names have
been changed from containing '-' to containing '_'.
This renaming can be seen in the time_sim.edn file.
Solution 1:
Workaround:
Remove any dashes ('-') from the end of names in the design, or replace them with
'_'.
End of Record #3938 - Last Modified: 08/04/98 12:23 |
