Answers Database
Orcad simulation: "Translation failed" when using "Convert XNF to VHDL"
Record #4121
Problem Title:
Orcad simulation: "Translation failed" when using "Convert XNF to VHDL"
Problem Description:
Urgency: standard
General Description: When using Simulate's Convert XNF to VHDL
command a user may get the error message: "translation failed"
from the Tools menu. The reason for the error may not be clear.
Solution 1:
One possible cause of this error is the use of non-alphanumeric
characters as part of a signal name in your VHDL source code.
For example, Xilinx accepts non-alphanumeric characters such
as tildes, slashes, plus signs, minus signs, asterisks, and so on
in signal names, but Simulate does not.
To fix the problem, follow these steps:
1.Open the design in Capture, replace non-alphanumeric characters
in signal names with alphanumeric characters, then save the design.
2.Use Xilinx software to generate a new .XNF file from the design.
3.From Simulate's Tools menu, choose Convert XNF to VHDL and
use your newly generated .XNF file.
End of Record #4121 - Last Modified: 08/26/98 12:11 |
