Answers Database
M1.5i/2.1i: Cannot TIMESPEC the TDO/MD1 pin on XC4000E/X FPGAs.
Record #4161
Product Family: Software
Product Line: Merged Core
Product Part: Timing
Problem Title:
M1.5i/2.1i: Cannot TIMESPEC the TDO/MD1 pin on XC4000E/X FPGAs.
Problem Description:
Urgency: Standard
General Description: Cannot create TIMESPEC's including the
TDO/MD1 output pad on XC4000E/X FPGAs. When time
constraints are applied that directly feed the TDO pin they are
reported "0 items analyzed, 0 timing errors detected." in the
timing report.
Solution 1:
You can trace the delay to the IOB pin, but you can not determine
the delay in the IOB. This can be done in the Timing Analyzer by
using the path filters to select the appropriate source and destination.
The destination is the net driving the buffer connected to TDO.
End of Record #4161 - Last Modified: 07/13/99 15:57 |
