Answers Database
UNISIMS: Adding the INIT attribute to VHDL/Verilog based FD models for RTL simulation?
Record #4685
Product Family: Software
Product Line: FPGA Implementation
Product Part: Unisim
Product Version: n/a
Problem Title:
UNISIMS: Adding the INIT attribute to VHDL/Verilog based FD models for RTL simulation?
Problem Description:
Urgency: Standard
General Description:
For RTL HDL simulation, how is the INIT attribute passed to the UNISIM
based FD models?
This feature is currently not available for Alliance 2.1i. This will be
implemented in the next production release.
Solution 1:
End of Record #4685 - Last Modified: 11/18/99 11:13 |
