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LOGIBLOX, 4K: Estimating the number of 4K RAM/ROM primitives used in LogiBLOX memories / When does LogiBLOX use 16x1 and 32x1 RAM/ROM primitives
Record #4710
Product Family: Software
Product Line: FPGA Implementation
Product Part: logiblox
Problem Title:
LOGIBLOX, 4K: Estimating the number of 4K RAM/ROM primitives used in LogiBLOX memories /
When does LogiBLOX use 16x1 and 32x1 RAM/ROM primitives
Problem Description:
Urgency: Standard
General Description: How to estimate the number and
type of RAM and ROM primitives used inside a LogiBLOX RAM or
ROM.
See Xilinx Solution #2735 on how to constrain LogiBLOX
memory using a UCF file.
Solution 1:
As documented in the A1.5 QuickStart Guide, Appendix H, p. 24:
- If the RAM/ROM depth that you specify is divisible
by 32, then 32x1 RAM (or ROM) primitives are used.
- If the RAM/ROM depth is not divisible by 32, then 16x1
primitives are used instead.
- 16x1 primitives are always used for Dual Port RAM.
Once you have determined whether 32x1 or 16x1 primitives have
been used, you can calculate the actual number of primitives
that were used.
Example:
Say a RAM48x4 was required for a design (depth=48, width=4).
In this case, RAM16x1 primitives would be used, because the
depth of 48 is not an even multiple of 32. To realize a data
width of 4 would require four banks of RAM16x1's. To realize
a depth of 48 using 16x1 RAM primitives, you would need 3 16x1
RAMs for each bank.
See (Xilinx Solution 5165) for information on the corresponding
implementation rules in COREGEN.
End of Record #4710 - Last Modified: 12/08/98 10:40 |