Answers Database
F1.5 / FPGA Express 2.1.2 : illegal connection on instantiated BUFG gives NGDBUILD error 142
Record #4799
Product Family: Software
Product Line: Synopsys
Product Part: FPGA Express
Product Version: 2.1.2
Problem Title:
F1.5 / FPGA Express 2.1.2 : illegal connection on instantiated BUFG gives NGDBUILD error 142
Problem Description:
Urgency: Standard
General Description:
In a design that has an instantiated BUFG, during synthesis Express issues a
FE-PADMAP1 warning. When the netlist is processed by the M1 tools, NGDBUILD
(Translate) gives an error like this:
Checking expanded design ...
ERROR:basnu:142 - input pad net "rclk1" has an illegal connection
Solution 1:
This problem has been seen in two different situations.
The first instance, the net with an illegal connection is bi-directional, and
in the second instance the net is just an input. In both cases the BUFG is
instantiated in a multiplexer arrangement. Essentially the input to the BUFG
is being driven by an external pin on the device, however in parallel because
of the Muxing structure this input was also driving combinatorial logic.
Express recognises that the BUFG is being driven from a PAD and hence issues the
FE-PADMAP 1 warning, and does not insert an IBUF. However because the pin is
also driving logic the connection is illegal. An IBUF should be inserted to
drive the combinatorial logic and the input to the BUFG.
Here is the connect formed :
IPAD ----------BUFG---------......
|
-----AND2 etc .......
What should be formed :
IPAD ---------IBUF -------------BUFG----......
|
-----AND2 etc......
The current workaround is to manually instantiate the IBUF in your HDL code as
well as the BUFG. This will still cause Express to issue the FE-PADMAP warning,
but because the cell is an IBUF all connections are now perfectly legal in the
netlist, and design will translate correctly.
End of Record #4799 - Last Modified: 10/21/98 13:59 |
