Answers Database
FPGA Express: Inferred latches always use LD_1 component instead of other primitives (LDCE, LDC)
Record #4972
Product Family: Software
Product Line: Synopsys
Product Part: FPGA Express
Product Version: 3.2
Problem Title:
FPGA Express: Inferred latches always use LD_1 component instead of other primitives (LDCE,
LDC)
Problem Description:
Urgency: Standard
General Description:
FPGA Express always uses the LD_1 component when a latch is inferred in the HDL code.
This may result in inefficient implementations if the latch includes a local reset or clock enable.
This occurs with FPGA Express 3.3.1 or earlier.
Solution 1:
The only workaround is to instantiate the specific latch primitive desired. These components
include LD, LDC, LDC_1, LDCE, and LDCE_1.
Consult the Xilinx Libraries Guide for a list of latch primitives for each family.
End of Record #4972 - Last Modified: 12/07/99 14:22 |
