Answers Database
FPGA Express 3.3: Abort at 59 occurs when parallel logic is coded
Record #5114
Product Family: Software
Product Line: Synopsys
Product Part: FPGA Express
Product Version: 3.2
Problem Title:
FPGA Express 3.3: Abort at 59 occurs when parallel logic is coded
Problem Description:
Urgency: Standard
General Description:
One cause of the Synopsys Internal Error "Abort at 59" has been due to code like this:
U1: BUFG port map (I => clk, O => clk_out);
clk_out <= clk;
This code is obviously going to cause problems due to the multiple drivers for clk_out,
but FPGA Express does not give a valid error message. This has been seen with versions
of FPGA Express up to and including 3.4.
Solution 1:
Remove one of the assignments and resynthesize.
End of Record #5114 - Last Modified: 01/13/00 12:43 |
