Answers Database


FPGA Express: Error L-1/C0 : #0 Not enough storage is available to complete this operation.


Record #5301

Product Family: Software

Product Line: Synopsys

Product Part: FPGA Express

Product Version: 2.1.3

Problem Title:

FPGA Express: Error   L-1/C0 : #0 Not enough storage is available to complete this
operation.



Problem Description:
Urgency: Standard

General Description:

When synthesizing a certain vhdl file through the HDE.EXE editor
(which uses Express), the following error may occur:
Error L-1/C0 : #0 Not enough storage is available to complete this operation.

or

    Error L-1/C0: #0 The remote procedure call failed.


Solution 1:

The underscore in a binary string causes FPGA Express to crash.
For example:

----------------------------------------------------------------------------------------------------
----
attribute enum_encoding of StateType : type is
     "00_0000_0000_0001 00_0000_0000_0010 00_0000_
                   0000_0100 00_0000_0000_1000 " &
     "00_0000_0001_0000 00_0000_0010_0000 00_0000_
                   0100_0000 00_0000_1000_0000 " &
     "00_0001_0000_0000 00_0010_0000_0000 00_0100_
                   0000_0000 00_1000_0000_0000 " &
     "01_0000_0000_0000 10_0000_0000_0000" ;
----------------------------------------------------------------------------------------------------
----

Removing underscore characters allows FPGA Express to synthesize succesfully:

----------------------------------------------------------------------------------------------------
----
attribute enum_encoding of StateType : type is
     "00000000000001 00000000000010 00000000000100 00000000001000 " &
     "00000000010000 00000000100000 00000001000000 00000010000000 " &
     "00000100000000 00001000000000 00010000000000 00100000000000 " &
     "01000000000000 10000000000000" ;
----------------------------------------------------------------------------------------------------
----




End of Record #5301 - Last Modified: 03/15/99 15:17

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!