Answers Database
1.5i Virtex Map - ERROR:baste:301: The RLOC value of R0C0.S1 on component D creates a macro that is too large for the device
Record #5491
Product Family: Software
Product Line: FPGA Implementation
Product Part: map
Product Version: 1.5i
Problem Title:
1.5i Virtex Map - ERROR:baste:301: The RLOC value of R0C0.S1 on component D creates a macro
that is too large for the device
Problem Description:
Urgency: Standard
General Description:
Using the following command lines causes a Map Error:
ngdbuild b -p virtex
map -pr b b -p vc150-bg352-4
Solution 1:
This error occurrs when a flop with a CLB RLOC attribute is incorrectly
packed into an IOB component based on use of the "-pr b" switch (pack
registers in IOBs). The error can be avoided by not using the -pr switch.
A work around is to use IOB attributes on flops to control register packing
rather than -pr swith:
INST "io_reg" IOB = TRUE;
INST "non_io_reg IOB = FALSE;
This problem has been fixed for the 2.1i release which is due to be begin
shipping in June, 1999.
End of Record #5491 - Last Modified: 06/04/99 15:49 |
