Answers Database
2.1i: 9500/XL: How to internally source BUFGTS, BUFGSR, BUFG
Record #5572
Problem Title:
2.1i: 9500/XL: How to internally source BUFGTS, BUFGSR, BUFG
Problem Description:
Urgency: Standard
General Description:
Sometimes it is necessary to internally generate the signal
to a global signal. Can I do this without having to route
the signal out of the chip and then back to the proper global
pin?
Solution 1:
Yes this can be done. Place an OBUF between the driving
logic and the BUFG (or BUFGTS or BUFGSR).
Example: You want to divide a clock by 2, and then use
that output on a global clock line. What you need to do
is place an OBUF after the divider register, and then
the output of the OBUF connects to a BUFG. The fitter
will then map the signal onto one of the dedicated
GCLK pins. The fitter than thinks that this pin is
bidirectional.
WARNING: This will make that pin active. Make sure the
pin that is used in this way is unconnected on the board.
End of Record #5572 - Last Modified: 01/03/00 13:35 |
