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M1.5i PAR: ERROR:xvkap:50 - Design conataines net <netname> driven by TBUFs that are constrained to different rows
Record #5582
Product Family: Software
Product Line: FPGA Implementation
Product Part: par
Product Version: 1.5i
Problem Title:
M1.5i PAR: ERROR:xvkap:50 - Design conataines net <netname> driven by TBUFs that are
constrained to different rows
Problem Description:
Urgency: Standard
General Description: A Virtex design Translates and Maps succesfully. In
Place and Route the following error is encountered:
ERROR:xvkap:50 - Design contains net <netname> driven by
TBUFs that are constrained to different rows.
Solution 1:
Check to see if 2 TBUFs in the same slice are driving to the same signal. In Virtex,
the TBUFs must drive different horizontal long lines. By moving the TBUFs so that
only 1 in each slice drives a specific net, PAR will interpret that TBUFs are
constrained to the same row and will not report an error.
End of Record #5582 - Last Modified: 04/16/99 14:59 |
