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FPGA Express 3.x: Error: Target 'L' is incompatible with assigned value in routine "=" line 490 when using IEEE.numeric_std (HDL-40)
Record #5698
Product Family: Software
Product Line: Synopsys
Product Part: FPGA Express
Product Version: 3.1
Problem Title:
FPGA Express 3.x: Error: Target 'L' is incompatible with assigned value in routine "=" line
490 when using IEEE.numeric_std (HDL-40)
Problem Description:
Urgency: Standard
General Description:
When using the IEEE.numeric_std library to perform a comparison between an unsigned number
and a natural number, the following error may occur:
Error: Target 'L' is incompatible with assigned value in routine "=" line 490 in file 'C:/fndtn/synt
h/lib/packages/IEEE/src/numeric_std.vhd'
called from test line 17 in file 'C:/myproj/test.vhd' (HDL-40)
If you examine the numeric_std.vhd file, you will see that the function called on line 490 (C.27)
is a comparison between an unsigned and a natural where the natural is expected first.
A similar function is called on line 502 (C.29) where the unsigned is expected first, but that
function is not called. The following code will produce this error:
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity test is
port (a : in unsigned(1 downto 0);
x : out boolean;
y : out boolean);
end test;
architecture arch of test is
constant zero : unsigned(1 downto 0) := "00";
constant natural_zero : natural := 0;
begin
x <= a = zero; -- works
y <= a = natural_zero; -- fails with HDL-40 error
end arch;
Solution 1:
Reverse the order of the comparison, so the natural is first, like so:
y <= natural_zero = a;
Solution 2:
Use the IEEE.std_logic_arith library instead of IEEE.numeric_std.
End of Record #5698 - Last Modified: 11/09/99 09:55 |
