Answers Database Virtex: What is the minimum pulse width for the PROGRAM pin? Record #5742 Problem Title: Virtex: What is the minimum pulse width for the PROGRAM pin? Problem Description: Urgency: Standard General Description: What is the minimum pulse width required for the PROGRAM pin such that configu ration will be re-started? Solution 1: One feature of FPGA's is that the user can re-configure the device after power up. This is done by toggling the PROGRAM pin LOW. This will reset the configuration state machine and when PROGRAM is r eleased the FPGA will re-start the configuration process. The minimum pulse width for the Virtex family is 200ns. However, the PROGRAM pin is connected to PR OGRAM pins of other families (Spartan or 4K) the minimum pulse width is 300ns. End of Record #5742 - Last Modified: 02/24/99 09:12

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