Answers Database


M1.5i: EPIC: core dump with segmentation fault when adding a pin to a block


Record #5785

Product Family: Software

Product Line: FPGA Implementation

Product Part: Epic

Product Version: 1.5is1

Problem Title:
M1.5i: EPIC: core dump with segmentation fault when adding a pin to a block


Problem Description:
Urgency: Normal

General Description:
Epic 1.5.25, 4044xla, Solaris 2.6
Core dump when trying to add a pin to a block.

Procedure to get crash of EPIC:

1. Open design in read/write mode. (chip.ncd & chip.pcf)
(EPIC:M1.5.25)

2. Select signal naack_oe_out in list to identify area for
change.

3. Go to clb_r2_c21 (nts106_out). EDITBLOCK

4. Select C3 as the input for FFX.

5. Select positive clock for FFX. Select ouput of FFX.

6. Set FFX as FF with set. Click OK.

7. Select XQ pin at lower right of clb_r2_c21.

8. Click add button.

9. Wait a coupla minutes and get 'segmentation fault' or
'bus error'.

Note: I also tried autorouting this pin without adding it
first. This also crashed.


Solution 1:

The problem is that the component was changed to a superbel.  When
components are superbel'd, the list of POBJs is not updated.  Hence,
when you traverse this list, it is likely that you will get corrupt data, since
entries may no longer be valid.    A workaround would be not to do any
timing analysis in EPIC after making a superbel without reworking the
constraints.



Solution 2:

Fixed in Next Release, 2.1

Woraround:
1. Turn off auto routing in epic main attribute window.
2. Make configuration changes to component, nts106_out or the
     particular component.
3. Modify external connectivity changes (I connected D and XQ
     pins to IOBs).
4. Save and close epic before trying to route the resulting nets.

If there are some problems, try "unbinding the macro in epic. Select
macro from list window, Edit => Unbind.




End of Record #5785 - Last Modified: 05/25/99 13:54

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