Answers Database
1.5i SP1 - ERROR:xvkap:53 RLOC constraints have been applied to a subset of the slices
Record #6032
Product Family: Software
Product Line: FPGA Implementation
Product Part: map
Product Version: 1.5is1
Problem Title:
1.5i SP1 - ERROR:xvkap:53 RLOC constraints have been applied to a subset of the slices
Problem Description:
Urgency: Standard
General Description:
When implementing a library component (which has macro's with RLOC's) Par fails
for Virtex device with the following error.
ERROR:xvkap:53 - RLOC constraints have been applied to a subset of the slices in
the carry chain containing the slice $Net00001_. RLOCs must either be applied to
every slice in a carry chain or none of the slices in a carry chain.
This error can potentially occur if the user has adsu8, acc8, cc8ce, cc8cled
in either Viewlogic or Foundation.
Solution 1:
Resolution:
Make a copy of the macro into the project library. Modify the attributes on the
copied macro so that no RLOCs are being used.
The Macro has been fixed for 2.1i.
End of Record #6032 - Last Modified: 05/19/99 19:27 |
