Answers Database
LogiCORE PCI64 Virtex (v3.0): Data bits in the first data phase of a burst transaction may be incorrect
Record #6206
Product Family: Documentation
Product Line: PCI Apps
Product Part: PCI Design Solutions
Problem Title:
LogiCORE PCI64 Virtex (v3.0): Data bits in the first data phase of a burst transaction may
be incorrect
Problem Description:
Urgency: Standard
Problem Description:
Data bits in the first data phase of any burst transaction are incorrect.
For example, 6 bytes in an 8-byte transfer are correct, but the middle
bytes may be incorrect. All subsequent data entries in the burst are
correct.
Note: This behavior is noticable only with actual silicon
Solution 1:
This may occur if the non-production Engineering Sample (ES) version
of silicon is being used. The production version of the Virtex silicon must
be used in order to get around this problem.
Solution 2:
The LogiCORE PCI64 Virtex requires the user to use additional
Virtex device data files. These files can be downloaded from the
FTP site @ ftp://ftp.xilinx.com/pub/applications/pci/patches.zip
Using the older device data files may result in this behavior as well.
End of Record #6206 - Last Modified: 04/15/99 16:59 |
