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M1.5i/2.1i: TRCE: What does the timing errors in a timing report correspond to in the design.


Record #6501

Product Family: Software

Product Line: FPGA Implementation

Product Part: trce

Product Version: 1.5is2

Problem Title:
M1.5i/2.1i: TRCE: What does the timing errors in a timing report correspond to in the design.



Problem Description:
Urgency: Standard

General Description:
  What do the timing error correspond to in the design?


Solution 1:

The number of timing errors are no longer dependent
on the number of paths that have timing errors, but
rather on the number of path endpoints (registers,
rams, pads) that failed to meet timing specifications.

Also see solution 3888, http://www.xilinx.com/techdocs/3888.htm




End of Record #6501 - Last Modified: 07/13/99 15:18

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