Answers Database
FPGA Express 3.2: LOC attribute not passed from HDL source
Record #6655
Product Family: Software
Product Line: Synopsys
Product Part: FPGA Express
Product Version: 3.2
Problem Title:
FPGA Express 3.2: LOC attribute not passed from HDL source
Problem Description:
Urgency: Standard
General Description:
FPGA Express 3.x has the ability to pass attributes from the HDL source, as described in
(Xilinx Solution 4392). However, attributes cannot be applied to top level ports. Therefore,
pin locations constraints may not be defined within the HDL code.
Solution 1:
Foundation Express or Alliance users:
Use the Express Constraints Editor, UCF file, or the Xilinx Constraints Editor to assign pin locatio
ns.
Base Express:
Use a UCF file or the Xilinx Constraints Editor to assign pin locations.
For correct UCF file syntax, please refer to our Libraries Guide on the web:
http://www.xilinx.com/support/sw_manuals/1_5i/index.htm, Chapter 12.
End of Record #6655 - Last Modified: 01/04/00 10:36 |
