Answers Database
LogiCORE PCI: All signals designated s/t/s in the spec must have pull-ups on them during simulation
Record #6696
Product Family: Documentation
Product Line: PCI Apps
Product Part: PCI Frequently Asked Questions
Problem Title:
LogiCORE PCI: All signals designated s/t/s in the spec must have pull-ups on them during
simulation
Problem Description:
Urgency: Standard
General Description: All signals designated s/t/s in the spec must have pull-ups on
them during simulation
Solution 1:
All signals in the spec designated as s/t/s (sustained tri-state) must have a
pull-up simulating the bus pull-up or the simulation will fail.
The signals in question are -
FRAME#, IRDY#, TRDY#, STOP#, LOCK#, DEVSEL#, PERR#, CLKRUN#
REQ64#, ACK64#
Note: Xilinx UNISIM library component PULLUP should be used for functional
simulation. Please refer to the answers database for examples on how to
instantiate the PULLUP component.
End of Record #6696 - Last Modified: 08/05/99 17:11 |
