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Virtex: What is the recommended way of setting or resetting FFs in a Virtex design? Do you still need to use STARTUP_VIRTEX block?


Record #6713

Product Family: Hardware

Product Line: Virtex

Product Part: Virtex General Hardware

Problem Title:
Virtex: What is the recommended way of setting or resetting FFs in a Virtex design? Do you still need to use STARTUP_VIRTEX block?



Problem Description:
Urgency: standard

Problem Description:

For HDL designs, what is the recommended way of asynchronously resetting or setting Flip Flops in a Virtex design, and why? Is it still necessary to use the STARTUP_VIRTEX block?


Solution 1:

Our recommended way of asynchronously reseting or setting FFs in Virtex designs is to write this high fan out reset/set signal explicitly in the HDL codes and not to use the STARTUP_VIRTEX block. There are two advantages:

1. This method gives you a faster speed. The reset/set signal will be routed onto the secondary long lines in the device, which are global lines with minimal skews and high speed. Therefore, the reset/set signal on the secondary lines has much faster speed than the speed of the GSR net of the STARTUP_VIRTEX block. Since Virtex is rich in routings, placing and routing this signal on the global lines can be easily done by our software.

2. Our trce program will analyze the delays of this explicitly written reset/set signal. Users can read the .twr file(report file of the trce program) and find out exactly how fast its speed is. Trce does not analyze the delays on the GSR net of the
STARTUP_VIRTEX.

It is not necessary to use the STARTUP_VIRTEX block if the reset/set signal is explicitly coded. However, users still have the option of using STARTUP_VIRTEX if they choose to and if the GSR speed is not a concern.




End of Record #6713 - Last Modified: 08/19/99 13:15

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