Answers Database
LogiCORE PCI: parity lines appear to be in conflict or not driven at all during simulation
Record #6809
Product Family: Software
Product Line: LogiCore
Product Part: PCI Core Generator
Product Version: 3.0
Problem Title:
LogiCORE PCI: parity lines appear to be in conflict or not driven at all during simulation
Problem Description:
Urgency: Standard
General Description:
During simulation of a PCI core, the parity lines may come up as
unknown's or undefined's (x's). This may give off the impression that
the signal is not properly being driven during bus parking or some other
time.
Solution 1:
In actuality, the x's are appearing as a result of pushing a high-Z into
a register. The HDL used to define parity generation does not include
pullups or pulldowns, so signals may go to high-z during simulation when
in actual hardware implementation these signals would instead be driven
to a real value. These unknowns can be ignored and parity can be
assumed to be driven, as the spec requires, and driven properly.
End of Record #6809 - Last Modified: 09/14/99 10:17 |
