Answers Database
Exemplar Spectrum 1998.2 is not inferring Xilinx Virtex flip flops with both synchronous set and reset
Record #6840
Product Family: Software
Product Line: Exemplar
Product Part: Leonardo Spectrum
Product Version: 1998.2
Problem Title:
Exemplar Spectrum 1998.2 is not inferring Xilinx Virtex flip flops with both synchronous set
and reset
Problem Description:
Urgency: Stanrdard
General Description:
I am describing a synchronous set and reset, which is valid in the Virtex
architecture. After the optimize step I am seeing the set signal and the
data signal being implemented in a LUT instead of utilizing the Virtex
specific features. This is resulting in an increased LUT count, and
area usage. I am using Leoanrdo Spectrum 1998.2e.
Solution 1:
The beta version contains fixes for inferring Xilinx Virtex flip flops with
synchronous set or reset. Currently the Exemplar software can not infer
a Virtex specific synchronous set and reset.
Current workarounds are:
1. Instantiate the component
2. Use the set include_gates "FDRSE FRSE FDRSE_1 FDSE_1"
from the variable editor within GUI or in the script.
Note: Using method 2. synthesis my swap the data and set signal. Due to
this it is recommended to use Step 1.
End of Record #6840 - Last Modified: 06/30/99 10:58 |
