Answers Database


2.1i: Timing Analyzer: Delay numbers not reported for pad to ifd/ofd to pad


Record #7082

Product Family: Software

Product Line: FPGA Implementation

Product Part: Timing Analyzer

Product Version: 2.1i

Problem Title:

2.1i: Timing Analyzer: Delay numbers not reported for pad to ifd/ofd to pad


Problem Description:
Urgency: Standard

General Description:
Timing Analyzer 2.1i is not reporting delay numbers from pad to ifd
or ofd to pad.


Solution 1:

Resolution:

A solution is to use the numbers in the DataBook.

Or create a timing constraint of OFFSET IN/OUT or Pads to FFS
and FFS to Pads. And this path will be reported in the timing report.




End of Record #7082 - Last Modified: 07/29/99 14:33

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!