Answers Database


FPGA Compiler, FPGA Express: What netlist formats are supported for Xilinx devices?


Record #7160

Product Family: Software

Product Line: Synopsys

Product Part: FPGA Compiler

Product Version: 1999.05

Problem Title:
FPGA Compiler, FPGA Express: What netlist formats are supported for Xilinx devices?


Problem Description:
Urgency: Standard

General Description:
What format netlist must I produce when using Synopsys products? What choices do I have?


Solution 1:

Virtex designs require EDIF netlists; XNF is not supported. When using FPGA Compiler
or Design Compiler, only generate a .SEDIF file. FPGA Express / Compiler II will produce a .EDF file.

For non-Virtex devices (3k, 4k, 5k, Spartan, 9k), Design Compiler will produce EDIF (.SEDIF) only, and FPGA Compiler will produce XNF (.SXNF) only. FPGA Express / Compiler II will produce XNF files for these families, but will produce EDIF in a future release.




End of Record #7160 - Last Modified: 08/05/99 13:31

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!