Answers Database
FPGA Express inserts ILD for ILDX_1 instantiation
Record #7242
Problem Title:
FPGA Express inserts ILD for ILDX_1 instantiation
Problem Description:
Urgency: Standard
General Description:
When one instantiates an ILDX_1, Express inserts an ILD into the netlist. This causes an
unexpanded block error in ngdbuild because an ILD is a macro and the XNF netlist hasn't
been placed in the user's project directory. It is also functionally incorrect.
Solution 1:
The current workaround is to copy the ildx.xnf netlist out of the fndtn/Synth/xilinx/macros/v6_xnf
directory, edit out the invertor within it and rename it as ildx_1, and place it into the project di
rectory
so ngdbuld (Translate) can find it. Do not add it to the FPGA Express project.
============================
LCANET, 6
PROG, WIR2XNF, 5.2.0, "created Sun Apr 14 19:46:51 1996 on UNIX from ildx16 with , P options"
PART, 4000E
SYM, $1I15, INLAT, SCHNM=ILDX_1, LIBVER=2.0.0, INIT=R
PIN, D, I, D
PIN, G, I, GB
PIN, GE, I, GE
PIN, Q, O, Q
END
SYM, $1I20, INV, SCHNM=INV, LIBVER=2.0.0
PIN, I, I, G
PIN, O, O, GB
END
EXT, D, I
EOF
========== Now becomes:
LCANET, 6
PROG, WIR2XNF, 5.2.0, "created Sun Apr 14 19:46:51 1996 on UNIX from ildx16 with , P options"
PART, 4000E
SYM, $1I15, INLAT, SCHNM=ILDX_1, LIBVER=2.0.0, INIT=R
PIN, D, I, D
PIN, G, I, GB
PIN, GE, I, GE
PIN, Q, O, Q
END
EOF
End of Record #7242 - Last Modified: 09/24/99 10:23 |
