Answers Database
JTAG - Mixed voltage JTAG chain considerations among E, XL, XV or 5V, 3.3V, 2.5V devices
Record #7270
Problem Title:
JTAG - Mixed voltage JTAG chain considerations among E, XL, XV or 5V, 3.3V, 2.5V devices
Problem Description:
Urgency: Standard
General Description:
How should a mixed voltage JTAG chain be laid out, what should the device order be,
and what should the VCC of the parallel cable be?
Solution 1:
Please review the following example.
Note that this applies to FPGA's even though the example is done with
the 9500 CPLD's
Example:
Chain consists of 9500 (5 Volt) and 9500XL (3.3 Volt):
All Xilinx XL parts are 5V tolerant (unless selected otherwise), and the 5 Volt
parts (i.e. 9500 or 4000E) will recognize 3.3V as a valid high. Therefore, in this
configuration the chain order does not matter (that is, it can either be
9500 -> 9500XL or 9500XL -> 9500). The VCC connected to the parallel cable
can be either 5V or 3.3V though it is recommended to drive the cable with the
same voltage as the last device in the chain
Solution 2:
Chain consists of 5 Volt, 3.3 volt, and 2.5 volt parts:
Note: 9500 devices are used as an example, but the
example applies to FPGA's as well.
Example:
In this configuration, order is important. The 9500XV is 3.3V compatible,
but not 5V compatible. Therefore, the 9500 (operating at 5 Volts) cannot
be directly connected to the 9500XV. This connection can be done if the
VCC of the 9500 is set to 3.3V, or if there is a 9500XL in between the two devices.
In either of these cases, the VCC of the cable will need to be 3.3V (more robust)
or 2.5V. Additionally, if there is a 9500XL in the chain, it is recommended to order
the devices in a descending order:
9500 -> 9500XL -> 9500XV and use a VCC to the cable of 3.3V.
End of Record #7270 - Last Modified: 01/10/00 19:32 |
