Answers Database
2.1i Ngdanno - Virtex single and dual port RAM give setup violations for Physical Sim only.
Record #7322
Product Family: Software
Product Line: FPGA Implementation
Product Part: ngdanno
Product Version: 2.1i
Problem Title:
2.1i Ngdanno - Virtex single and dual port RAM give setup violations for Physical Sim only.
Problem Description:
Urgency: Standard
Problem Description:
The SRMUX delay is being dropped for all RAM WE and SRLUT CE inputs (it is correctly
modelled for FF PRE and CLR inputs). The amount of the error ranges from roughly 250ps
to 320ps across Virtex speed grades.
Solution 1:
This problem is fixed in the latest 2.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates/
End of Record #7322 - Last Modified: 10/15/99 14:50 | 
