Answers Database C_IP2, V2.1i COREGEN: Virtex Variable Parallel Multiplier optional pins appear in a Foundation symbol even when not requested Record #7397 Product Family: Software Product Line: LogiCore Product Part: Coregen IP Modules Problem Title: C_IP2, V2.1i COREGEN: Virtex Variable Parallel Multiplier optional pins appear in a Foundation symbol even when not requested Problem Description: Urgency: hot General Description: The Foundation symbol generated for the Virtex Dynamic Constant Coefficient and Variable Parallel Multipliers ALWAYS contains the optional pins (typically CE, ACLR, ASET, SCLR and/or SSET) regardless of whether or not they have been requested by the user. Because the pins were not requested, the underlying EDIF implementation netlist for the core will not contain these pins. This mismatch between symbol and netlist results in "unexpanded block" errors in NGDBUILD when the design containing the core is processed. The Foundation symbol for a CORE Generator core is generated by a Foundation- specific executable called NET2SYM, which takes an XSF file (an XNF file containing only the module's ports) as input. Solution 1:   This problem is fixed in the latest 2.1i Service Pack available at: http://support.xilinx.com/support/techsup/sw_updates/ Cross reference is (Xilinx Solution #6853). End of Record #7397 - Last Modified: 10/15/99 13:14

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