Answers Database 2.1i 4KX* Map - Map does not properly place floorplanned DPRAMs Record #7408 Product Family: Software Product Line: FPGA Implementation Product Part: map Product Version: 2.1i Problem Title: 2.1i 4KX* Map - Map does not properly place floorplanned DPRAMs Problem Description: Urgency: Urgent General Description: After floorplanning DPRAMs in a design and doing a subsequent map and PAR, the flooplanning efforts neglect the DPRAMs. Solution 1: This problem is scheduled to be fixed in the next (as yet unnamed) release following version 2.1i. This release is currently scheduled for March, 2000. Solution 2: Solution: The format for LOC specifiers in the MFP file generated by the Floorplanner was changed in Carnelian. The LOC specifiers now have the "CLB_" site type specifier (e.g. CLB_R2C3) whereas before this was not included (e.g. R2C3). The mapper code for constraining dual-port RAM was not adjusted. The workaround is to edit the MFP RAMD records to remove the "CLB_" prefix. End of Record #7408 - Last Modified: 10/07/99 13:27

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