Answers Database XPLA PC-ISP Programmer: ATE vector clock speed for TCK. Record #7575 Product Family: Software Product Line: CoolRunner Product Part: XPLA ISP Problem Title: XPLA PC-ISP Programmer: ATE vector clock speed for TCK. Problem Description: Urgency: Standard General Description: What clock speed should I use for TCK in my ATE to run the ATE vectors? Solution 1: We generate our program and init pulses by requesting a delay based upon a number of TCKs during programming. This value is set at an arbitrary 10,000 clock pulses (for at least a 10ms delay). Our devices require a 10 ms program pulse, so this means that TCK generated by the ATE setup can not be faster than 1 MHz. End of Record #7575 - Last Modified: 10/11/99 16:43

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!