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Answers Database
XPLA PC-ISP Programmer: XPLA1 ISP Proto Board CPLD does not function improperly.
Record #7579
Product Family: Software XPLA PC-ISP Programmer: XPLA1 ISP Proto Board CPLD does not function improperly. Problem Description: Urgency: Standard General Description: Why does the XPLA1 ISP Demo Board CPLD function improperly? Solution 1: The on-board clock circuit on the ISP demo board produces a clock with rise and fall times that are slower than specified in the data sheet. This can cause improper clocking within the part and cause unpredictable behavior. The slow rise/fall time is due to a termination resistor on the board, R2, that provides termination if an external clock is used for the board. This resistor should be removed from the board if the on-board clock circuit is being used. End of Record #7579 - Last Modified: 10/11/99 16:42 |
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