Answers Database
XPLA Architecture: Fast Zero Power or FZP.
Record #7597
Product Family: Hardware
Product Line: R3000
Product Part: R3032
Problem Title:
XPLA Architecture: Fast Zero Power or FZP.
Problem Description:
Urgency: Standard
General Description: How does FZP work?
Solution 1:
In non-FZP devices, a product term word line is traditionally made up
of an internal node with wired-NOR transistors tied in parallel. These
transistors sum their individual capacitances resulting in sluggish time
constants. These CPLDs implement sense amplifiers to buffer these
internal nodes, resulting in faster propagation delays. The sense
amplifier approach works and yields a fast tpd, but this method requires
a significant amount of power because the sense amplifiers must
operate in the linear region and are always 'on'.
Fast Zero Power devices are made up of a true 'chain of gates' on
a CMOS process. This eliminates the active sense amplifier power
requirement which results in a true low power CPLD.
End of Record #7597 - Last Modified: 10/11/99 16:32 |
