Answers Database
XPLA1: Characteristics of I/O's during power up/down.
Record #7648
Product Family: Hardware
Product Line: R3000
Product Part: R3032
Problem Title:
XPLA1: Characteristics of I/O's during power up/down.
Problem Description:
Urgency: Standard
General Description: What are the characteristics of I/O's during power
up/down for XPLA1 devices?
Solution 1:
All I/O's stay in tri-state during power up and during power down.
When the device is powering up, an internal voltage sense circuit
monitors VDD. When it determines that the potential is sufficient enough
to 'run' the chip, it starts a configuration process which concludes with
the release of the I/O tri-state. This voltage level is approximately 2.4
volts (not guaranteed).
During power down, when the VDD monitor 'sees' the voltage has
dropped to approximately 2.1 Volts (not guaranteed) the I/O?s are placed
back into tri-state before the integrity of the internal logic is lost.
This power up / power down method ensures that XPLA devices will
reside as benignly as possible in under voltage conditions.
End of Record #7648 - Last Modified: 11/29/99 15:44 |
