Answers Database Virtex-E JTAG - IO bank voltages in Virtex and Virtex-E JTAG pins act differently Record #7738 Problem Title: Virtex-E JTAG - IO bank voltages in Virtex and Virtex-E JTAG pins act differently Problem Description: Urgency: Standard General Description: How do the voltage levels on the JTAG pins react when different voltages are applied to vcco and vccio on Virtex devices? Solution 1: Virtex: The inputs are driven off of VCCINT so it does not matter what VCCO is set at. However, the output TAP pin TDO will drive the rail to rail value of the VCCO supply on its bank. That bank (usually bank 2) should be set to 3.3 volts. Solution 2: Virtex-E The JTAG input pins (TDI, TMS, TCK) do not have a VCCO requirement. They will operate with either 1.8, 2.5V, or 3.3V input signalling levels. The output pin (TDO) is sourced from the VCCO in bank 2 and for proper operation of LVTTL 3.3V levels the bank should be supplied with 3.3V. If on the other hand the receiving TDI pin can accept a lower threshold (2.5, 1.8) then this voltage may be applied for the bank. End of Record #7738 - Last Modified: 01/10/00 21:45

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