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2.1i XC4000XL PAR - Guided par of XC4000XL device does not work in 2.1i Service Pack 1 or 2.


Record #7938

Product Family: Software

Product Line: FPGA Implementation

Product Part: par

Product Version: 2.1i

Problem Title:

2.1i XC4000XL PAR - Guided par of XC4000XL device does not work in 2.1i Service Pack 1 or 2.


Problem Description:
Urgency: Standard

General Description:
PAR is unable to guide a 4000XL design in Cs1 or Cs2. It fails with
the following errors, even though the clock networks are identical
and there are no prohibits in the .pcf file.

ERROR:Place:489 - The clock group consisting of the following components is
    impossible to legally place, as all of the site sets that could hold this
    configuration contain a prohibited site that this group requires. Please
    consult the Xilinx Programmable Logic Data Book for more information on clock
    buffers.
<I_178, CLOCK>
ERROR:Place:489 - The clock group consisting of the following components is
    impossible to legally place, as all of the site sets that could hold this
    configuration contain a prohibited site that this group requires. Please
    consult the Xilinx Programmable Logic Data Book for more information on clock
    buffers.
<I_95, WR_CLOCK>


Solution 1:

This problem is fixed in the latest 2.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates/




End of Record #7938 - Last Modified: 01/25/00 16:11

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