Xilinx Answer #8189 : 2.1isp3 Virtex Bitgen: Virtex bit file from bitgen with default options causes improper behavior on CLKDLL

Answers Database

2.1isp3 Virtex Bitgen: Virtex bit file from bitgen with default options causes improper behavior on CLKDLL

Record #8189
Problem Title:

2.1isp3 Virtex Bitgen: Virtex bit file from bitgen with default options causes improper behavior on CLKDLL

Problem Description:

Urgency: Hot

General Description:
A Virtex bit file produced from 2.1iSP3 bitgen is different than that produced from sp2. The DLL feedback will be stuck at high or low, so the DLL will not lock. This would only affect Virtex devices using SP3. VirtexE devices will still work fine.

Solution 1:

The following bitgen option must be used to workaround this problem:

-g Ilvl1_mux_20:1 -g Ilvl1_mux_24:1

In order to incorporate the above command option into the GUI flow, the
following needs to be done in Design manager or Foundation Project manager:

From the Design Manager window:
1. Select Utilities-->Template Manager
2. Select Configuration Templates
3. Click "customize"
4. Program name "bitgen"
5. Program Options: "<type above command line>"
6. Set-->OK

OR

From the Foundation Project Manager window :
1. Select Tools-->Utilities-->Implementation Template Manager
2. Select Configuration Templates
3. Click "customize"
4. Program name "bitgen"
5. Program Options: "<type above command line>"
6. Set-->OK

End of Record #8189 - Last Modified: 12/08/99 16:10

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!